Semiconductor Engineering

FPGA-Based HW/SW Platform For Pre-Silicon Emulation Of RISC-V Designs (Barcelona Supercomputing Center)

A technical paper titled “Makinote: An FPGA-Based HW/SW Platform for Pre-Silicon Emulation of RISC-V Designs” was published by researchers at Barcelona Supercomputing Center and Universitat ...
Semiconductor Engineering

EDA Tool To Detect SW-HW Vulnerabilities Ensuring Data Confidentiality In A RISC-V Architecture

A technical paper titled “SoftFlow: Automated HW-SW Confidentiality Verification for Embedded Processors” was published by researchers at RWTH Aachen University, Robert Bosch, and Newcastle University ...
EDN

The next RISC-V processor frontier: AI

The RISC-V Summit North America, held on 22-23 October 2025 in Santa Clara, California, showcased the latest CPU cores featuring new vector processors, high-speed interfaces, and peripheral subsystems ...
Electronic Design

RISC-V RVA23—A Major Milestone

The 2024 RISC-V Summit North America marked a significant milestone for the RISC-V community with the ratification of the RVA23 Profile. This event signifies a major step forward in the evolution of ...