EDN

Xilinx ISE 12 adds intelligent clock gating

SAN FRANCISCO—Xilinx Inc. Monday (May 3) introduced a new version of its ISE Design Suite to support its Virtex-6 and Spartan-6 FPGA families. According to the company, ISE 12 adds intelligent clock ...
Hackaday

Yosys Fronts For Xilinx ISE

We always marvel at how open-source tools can often outstrip their commercial counterparts. Yosys, the open-source tool for Verilog synthesis, is a good example. Although the Xilinx ISE design suite ...
Design-Reuse

Xilinx Releases ISE WebPACK 8.2i - FPGA Industry's Only Free Fully Featured Design Suite

SAN JOSE, Calif. -- July 17, 2006-- Xilinx, Inc. today announced the immediate availability of the Integrated Software Environment (ISE(TM)) WebPACK(TM) 8.2i release -- the latest version of the ...
Design-Reuse

Xilinx Announces ISE Design Suite 13.4 Further Extending 7 Series FPGA Support and Design Productivity

Latest release includes the New MicroBlaze Micro Controller System, Enhanced Debug with 2D Eye Scan and Partial Reconfiguration Support for Artix-7 and Virtex-7 XT FPGAs SAN JOSE, Calif. -- Jan. 18, ...
Hackaday

Xilinx Borrows Code For Their Own Devices

Back in 2012, [tmbinc] discovered a neat little undocumented feature in the Xilinx ISE: the ability to use TCP/IP instead of JTAG cables. [tmbinc] was working on an Open Hardware USB analyzer and ...
SpaceNews

Hundreds of Xilinx Space Grade FPGAs Deployed in Launch of Iridium NEXT Satellites

Xilinx, Inc. (NASDAQ: XLNX) announced today that hundreds of its Space Grade FPGAs were deployed in the launch of the Iridium NEXT satellites. Space Grade Virtex®-5QV devices provide scalability and ...
Business Wire

Insight Memec Ships Xilinx Spartan-3 LC Development Kit; Learn the Fundamentals in Our Hands-on Workshop Beginning March 16, 2004

SAN DIEGO--(BUSINESS WIRE)--March 9, 2004--Insight Memec today announced the immediate availability of a new Xilinx(R) Spartan-3(TM) LC development kit designed by Memec Design for FPGA system ...