IEEE

FPGA based UART Design: Simulation, Synthesis & System Verilog functional verification

Abstract: The UART is a communication protocol that operates on serial data transmission (sending information bit-by-bit) between different modules asynchronously. As the number of devices increases, ...
IEEE

FPGA-Based Wild Animal Detection System Using Verilog: Advancing Surveillance and Mitigating Human-Wildlife Conflicts

Abstract: In the context of wildlife monitoring, the challenge of real-time animal detection in surveillance systems has been addressed using FPGA-based hardware acceleration. To this end, this paper ...
GitHub

FPGA-Based CNN Accelerator for MNIST Digit Recognition

This repository contains the complete RTL design and verification environment for a fully hardware-based Convolutional Neural Network (CNN) accelerator. The system is designed from scratch in Verilog ...